Resources Category: Brochure

Synopsys TestMAX DFT is a comprehensive, advanced design-for-test (DFT) tool that addresses the cost challenges of testing designs across a range of complexities. TestMAX DFT supports all essential DFT, including boundary scan, scan chains, core wrapping, test points, and compression. These DFT structures are implemented through TestMAX Manager for early validation of the corresponding register transfer level (RTL), or with Synopsys synthesis tools to generate netlists.

The Synopsys Verdi® debug and verification management platform is an all-encompassing solution designed to streamline and enhance your design entry, debug and verification management. With its robust capabilities and connection into the most popular signal database (FSDB), Verdi empowers you to plan, execute and determine coverage of your simulation regressions. Furthermore, Verdi offers world-class debug capabilities to provide you insight into all design and verification flows. Verdi includes powerful AI technology to automate difficult and tedious debug steps and easily navigate diverse and complicated design environments

IC Compiler™ II is the industry leading place and route solution that delivers best-in-class quality-of-results (QoR) for next-generation designs across all market verticals and process technologies while enabling unprecedented productivity. IC Compiler II includes innovative for flat and hierarchical design planning, early design exploration, congestion aware placement and optimization, clock tree synthesis, advanced node routing convergence, manufacturing compliance, and signoff closure

The Synopsys FPGA design tools are comprised of synthesis and debug tools that enable designers to quickly deliver competitive products to market with the lowest schedule risk. The Synplify FPGA synthesis tools provide fast runtime, performance, area optimization for cost and power reduction, multi-FPGA vendor support, incremental and team-design capabilities for faster FPGA design development. In addition, Synplify supports Synopsys Design Ware IP, links to VCS high-performance functional verification, integration and an ASIC compatible synthesis flow.

Synopsys Design Compiler® NXT is the next step in the evolution of the industry leading Synopsys Design Compiler family. Building on the industry-standard Synopsys Design Compiler Graphical to continue delivering innovative synthesis technology, Synopsys Design Compiler NXT delivers 2X faster runtime and superior quality of results (QoR). The technology links from Synopsys Design Compiler Graphical into Synopsys IC Compiler™ II are further strengthened to tighten timing, parasitic resistance, and capacitance correlation between synthesis and place-and-route. Synopsys Design Compiler NXT synthesis technology is enabled for next-generation process node technologies, including below 5nm.

Synopsys’ IC Validator physical verification is a comprehensive signoff solution improving productivity for customers at all process nodes from mature to advanced. The IC Validator tool offers the industry’s best distributed processing scalability to over 2000 CPU cores. The tool’s performance and scalability has enabled some of the industry’s largest reticle limit chips with billions of transistors, same day design rule checking (DRC), layout versus schematic (LVS), and dummy fill turnaround time